
2011 Microchip Technology Inc.
DS39932D-page 75
PIC18F46J11 FAMILY
RPINR8
PIC18F2XJ11
PIC18F4XJ11
---1 1111
---u uuuu
RPINR7
PIC18F2XJ11
PIC18F4XJ11
---1 1111
---u uuuu
RPINR6
PIC18F2XJ11
PIC18F4XJ11
---1 1111
---u uuuu
RPINR4
PIC18F2XJ11
PIC18F4XJ11
---1 1111
---u uuuu
RPINR3
PIC18F2XJ11
PIC18F4XJ11
---1 1111
---u uuuu
RPINR2
PIC18F2XJ11
PIC18F4XJ11
---1 1111
---u uuuu
RPINR1
PIC18F2XJ11
PIC18F4XJ11
---1 1111
---u uuuu
RPOR24
—
PIC18F4XJ11
---0 0000
---u uuuu
RPOR23
—
PIC18F4XJ11
---0 0000
---u uuuu
RPOR22
—
PIC18F4XJ11
---0 0000
---u uuuu
RPOR21
—
PIC18F4XJ11
---0 0000
---u uuuu
RPOR20
—
PIC18F4XJ11
---0 0000
---u uuuu
RPOR19
—
PIC18F4XJ11
---0 0000
---u uuuu
RPOR18
PIC18F2XJ11
PIC18F4XJ11
---0 0000
---u uuuu
RPOR17
PIC18F2XJ11
PIC18F4XJ11
---0 0000
---u uuuu
RPOR16
PIC18F2XJ11
PIC18F4XJ11
---0 0000
---u uuuu
RPOR15
PIC18F2XJ11
PIC18F4XJ11
---0 0000
---u uuuu
RPOR14
PIC18F2XJ11
PIC18F4XJ11
---0 0000
---u uuuu
RPOR13
PIC18F2XJ11
PIC18F4XJ11
---0 0000
---u uuuu
RPOR12
PIC18F2XJ11
PIC18F4XJ11
---0 0000
---u uuuu
RPOR11
PIC18F2XJ11
PIC18F4XJ11
---0 0000
---u uuuu
RPOR10
PIC18F2XJ11
PIC18F4XJ11
---0 0000
---u uuuu
RPOR9
PIC18F2XJ11
PIC18F4XJ11
---0 0000
---u uuuu
RPOR8
PIC18F2XJ11
PIC18F4XJ11
---0 0000
---u uuuu
RPOR7
PIC18F2XJ11
PIC18F4XJ11
---0 0000
---u uuuu
RPOR6
PIC18F2XJ11
PIC18F4XJ11
---0 0000
---u uuuu
RPOR5
PIC18F2XJ11
PIC18F4XJ11
---0 0000
---u uuuu
RPOR4
PIC18F2XJ11
PIC18F4XJ11
---0 0000
---u uuuu
RPOR3
PIC18F2XJ11
PIC18F4XJ11
---0 0000
---u uuuu
RPOR2
PIC18F2XJ11
PIC18F4XJ11
---0 0000
---u uuuu
RPOR1
PIC18F2XJ11
PIC18F4XJ11
---0 0000
---u uuuu
RPOR0
PIC18F2XJ11
PIC18F4XJ11
---0 0000
---u uuuu
TABLE 5-2:
INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on Reset,
Brown-out Reset,
Wake From
Deep Sleep
MCLR Resets
WDT Reset
RESET
Instruction
Stack Resets
CM Resets
Wake-up via WDT
or Interrupt
Legend: u
= unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Note 1:
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
2:
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the
interrupt vector (0008h or 0018h).
3:
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
4:
See Table 5-1 for Reset value for specific condition.
5:
Not implemented for PIC18F2XJ11 devices.
6:
Not implemented on "LF" devices.